module top();

wire [3:0] a,b;
wire Cin;
wire [3:0] S;
wire Cout;
reg a_reg;
reg b_reg;
reg Cin_reg;

adder_4 test(.a(a),.b(b),.Cin(Cin),.S(S),.Cout(Cout));

assign a = a_reg;
assign b = b_reg;
assign Cin = Cin_reg;


initial
begin
 $monitor( "A=%b,  \nB=%b, \nCin=%b\n S=%b\n Cout=%b\n",a,b,Cin,S,Cout);
end 


initial
begin

 #10; 
 a_reg  =4'b0000;
 b_reg  =4'b0000;
 Cin_reg=1'b0;


 #10;
 a_reg  =4'b0001;
 b_reg  =4'b0000;
 Cin_reg=1'b0;


 #10;
 a_reg  =4'b0001;
 b_reg  =4'b0000;
 Cin_reg=1'b1;

end


endmodule

